Same price, near identical footprint, and it adds what the safety loop needs.
RP2350: dual Arm Cortex-M33 at 150 MHz with hardware single precision floating point and DSP instructions, 520 kB SRAM in 10 banks, Arm TrustZone, signed boot, 8 kB OTP for keys, SHA-256, hardware TRNG, glitch detectors, 2 I2C, 2 SPI, 2 UART, 12 PIO state machines, hardware watchdog.
Why it matters: the per column fusion and drop off detection run in hardware float instead of software float; the buffers for two grids plus radar tracks fit in SRAM; signed boot protects the safety firmware from a bad flash.
Alternatives: RP2040 (works today, no FPU); STM32G4 (excellent hard real time, single core, keep as fallback if RP2350 supply fails); ESP32 alone (rejected, its radio stack makes hard real time unclean; it stays as the Spine only).
The loop: read both grids on the sensor I2C bus and the radar on UART, fuse to a per column nearest distance map, detect drop offs, apply the three laws to produce 20 amplitude and rhythm commands, write them through the actuator I2C bus, service the watchdog every tick. Two I2C buses so a stuck actuator write can never delay a sensor read. Brownout and watchdog reset to a safe state with all motors off.
Isolation: the Reflex has no data dependency on the Spine or the phone. It only transmits. Nothing upstream can block it.
